Introduction to Microservice Architecture Using SpringBoot - Part 1

1. Explain timer and counter device?

A timer is a specialized type of clock which is used to measure time intervals. A timer that counts from zero upwards for measuring time elapsed is often called a stopwatch. It is a device that counts down from a specified time interval and is used to generate a time delay, for example, an hourglass is a timer.

1. The register incremented for every machine cycle. 

2. The maximum count rate is 1/12 of the oscillator frequency. 

3. A timer uses the frequency of the internal clock and generates delay.

A counter is a device that stores (and sometimes displays) the number of times a particular event or process occurred, with respect to a clock signal. It is used to count the events happening outside the microcontroller. In electronics, counters can be implemented quite easily using register-type circuits such as a flip-flop.

1. The register is incremented considering 1 to 0 transition at its corresponding to an external input pin (TO, T1).

2. Maximum count rate is 1/24 of the oscillator frequency. 3. A counter uses an external signal to count pulses.

2. Explain Serial Communication Protocol and Parallel Communication Protocols.

The communication is very well known terminology. which involves the exchange of information between two or more mediums. In embedded systems, the communication means the exchange of data between two microcontrollers in the form of bits. This exchange of data bits in microcontroller is done by some set of defined rules known as communication protocols. Now if the data is sent in series i.e. one after the other then the communication protocol is known as Serial Communication Protocol. More specifically, the data bits are transmitted one at a time in sequential manner over the data bus or communication channel in Serial Communication. There are different types of data transfer available in the digital electronics such as serial communication and parallel communication.

Similarly, the protocols are divided into two types such as Serial Communication Protocol and Parallel Communication Protocols. Examples of Parallel Communication Protocols are ISA, ATA, SCSI, PCI and IEEE-488. Similarly, there are several examples of Serial Communication Protocols such as CAN, ETHERNET, 12C, SPI, RS232, USB, 1-Wire, and SATA etc. Serial communication is the most widely used approach to transfer information between data processing peripherals. Every electronics device whether it is Personal Computer (PC) or Mobile runs on serial communication. The protocol is the secure and reliable form of communication having a set of rules addressed by the source host (sender) and destination host (receiver) similar to parallel communication.

3. What are serial and parallel communication ports used in embedded system?

Serial communication port:

In an embedded system, serial communication is the way of exchanging data using different methods in form of serial digital binary, some of the well-known interfaces used for the data exchange are RS-232, RS485, 12C, SPI etc.

A serial port connection can be used for inter- processor communication within a system or for communication with different parts of a system. The serial port equipment but a communication protocol has to used to ensure a reliable, error-free data path.

Parallel communication port:

In parallel communication, a chuck of data (8, 16 or 32 bit) is sent at a time. so, each bit data requires a separates physical I/O line. The advantage of parallel communication is it fact but its drawback is it use more number of I/O (input-output) lines.

4. Explain watchdog timer?

The Watchdog Timer is a free running on-chip RC oscillator which does not require any external components. This RC oscillator is separate from the RC oscillator of the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the OSC 1/CLKIN and OSC2/CLKOUT pins of the device has been stopped, for example, by execution of a SLEEP instruction. During normal operation, a WDT time-out generates a device reset. If the device is in SLEEP mode, a WDT time-out causes the device to wake-up and continue with normal operation. The WDT can be permanently disabled by clearing configuration bit WDTE.

WDT PERIOD: The WDT has a nominal time-out period of 18 ms, (with no prescaler). The time-out periods vary with temperature, VDD and process variations from part to part (see DC specs). If longer time-out periods are desired, a prescaler with a division ratio of up to can be assigned to the WDT under software control by writing to the OPTION register. Thus, time-out periods up to seconds can be realized. The CLRWDT and SLEEP instructions clear the WDT and the postscaler, if assigned to the WDT, and prevent it from timing out and generating a device RESET condition. The TO bit in the STATUS register will be cleared upon a WDT time- out. WDT PROGRAMMING CONSIDERATIONS: It should also be taken in account that under worst case conditions (VDD = Min., Temperature = Max., max WDT prescaler) it may take several seconds before a WDT time-out occurs.

5. What Does Real-Time Clock (RTC) Mean?

A real-time clock (RTC) is a computer clock, usually in the form of an integrated circuit that is solely built for keeping time. Naturally, it counts hours, minutes, seconds, months, days and even years. RTCs can be found running in personal computers, embedded systems and servers, and are present in any electronic device that may require accurate time keeping. Being able to still function even when the computer is powered down through a battery or independently from the system’s main power is fundamental.

Benefits of RTCs include:

1. RTC ICs have proved to be more precise than other methods — like programming the timer of the controller.
2. It frees the main system from time-critical tasks.
3. It has low power consumption and improved frequency stability.

6. I2C Communication Protocol 

I2C stands for Inter-Integrated Circuit. It is a bus interface connection protocol incorporated into devices for serial communication. It was originally designed by Philips Semiconductor in 1982. Recently, it is a widely used protocol for short-distance communication. It is also known as Two Wired Interface(TWI).

Working of I2C Communication Protocol :

It uses only 2 bi-directional open-drain lines for data communication called SDA and SCL. Both these lines are pulled high.

Serial Data (SDA) – Transfer of data takes place through this pin.

Serial Clock (SCL) – It carries the clock signal.

I2C operates in 2 modes –

• Master mode
• Slave mode

Each data bit transferred on SDA line is synchronized by a high to the low pulse of each clock on the SCL line. According to I2C protocols, the data line can not change when the clock line is high, it can change only when the clock line is low. The 2 lines are open drain, hence a pull-up resistor is required so that the lines are high since the devices on the I2C bus are active low. The data is transmitted in the form of packets which comprises 9 bits. The sequence of these bits are –

Start Condition – 1 bit

Slave Address – 8 bit

Acknowledge – 1 bit

Start and Stop Conditions :

START and STOP can be generated by keeping the SCL line high and changing the level of SDA. To generate START condition the SDA is changed from high to low while keeping the SCL high. To generate STOP condition SDA goes from low to high while keeping the SCL high, as shown in the figure below.

Repeated Start Condition :

Between each start and stop condition pair, the bus is considered as busy and no master can take control of the bus. If the master tries to initiate a new transfer and does not want to release the bus before starting the new transfer, it issues a new START condition. It is called a REPEATED START condition.

Read/Write Bit :

A high Read/Write bit indicates that the master is sending the data to the slave, whereas a low Read/Write bit indicates that the master is receiving data from the slave. 

ACK/NACK Bit :

After every data frame, follows an ACK/NACK bit. If the data frame is received successfully then ACK bit is sent to the sender by the receiver.  

Addressing :

The address frame is the first frame after the start bit. The address of the slave with which the master wants to communicate is sent by the master to every slave connected with it. The slave then compares its own address with this address and sends ACK.

I2C Packet Format :

In the I2C communication protocol, the data is transmitted in the form of packets. These packets are 9 bits long, out of which the first 8 bits are put in SDA line and the 9th bit is reserved for ACK/NACK i.e. Acknowledge or Not Acknowledge by the receiver. 

START condition plus address packet plus one more data packet plus STOP condition collectively form a complete Data transfer.

Features of I2C Communication Protocol :

• Half-duplex Communication Protocol – 
• Bi-directional communication is possible but not simultaneously.
• Synchronous Communication – 
• The data is transferred in the form of frames or blocks.
• Can be configured in a multi-master configuration.
• Clock Stretching – 
• The clock is stretched when the slave device is not ready to accept more data by holding the SCL line low, hence disabling the master to raise the clock line. Master will not be able to raise the clock line because the wires are AND wired and wait until the slave releases the SCL line to show it is ready to transfer next bit.

Advantages :

1. Can be configured in multi-master mode.
2. Complexity is reduced because it uses only 2 bi-directional lines (unlike SPI Communication).
3. Cost-efficient.
4. It uses ACK/NACK feature due to which it has improved error handling capabilities.

Limitations :

1. Slower speed.
2. Half-duplex communication is used in the I2C communication protocol.

7. What Does Controller Area Network (CAN) Mean?

A Controller Area Network (CAN) bus is a communication system made for vehicle intercommunication. This bus allows many microcontrollers and different types of devices to communicate with each other in real time and also without a host computer. A CAN bus, unlike Ethernet, does not require any addressing schemes, as the nodes of the network use unique identifiers. This provides the nodes with information regarding the priority and the urgency of the transmitted message. These buses also continue transmission even in the case of a collision, while normal Ethernet terminates connections as soon as a collision is detected. It is a completely message-based protocol, and is used mainly in vehicles.

8. What Is an Instruction Set Architecture?

An Instruction Set Architecture (ISA) is part of the abstract model of a computer that defines how the CPU is controlled by the software. The ISA acts as an interface between the hardware and the software, specifying both what the processor is capable of doing as well as how it gets done.

The ISA provides the only way through which a user is able to interact with the hardware. It can be viewed as a programmer’s manual because it’s the portion of the machine that’s visible to the assembly language programmer, the compiler writer, and the application programmer.

The ISA defines the supported data types, the registers, how the hardware manages main memory, key features (such as virtual memory), which instructions a microprocessor can execute, and the input/output model of multiple ISA implementations. The ISA can be extended by adding instructions or other capabilities, or by adding support for larger addresses and data values.